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NXP Semiconductors /LPC5410x /GPIO /CLR0

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Interpret as CLR0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CLRP

Description

Clear port 0/1

Fields

CLRP

Clear output bits. Supported pins depends on the specific device and package. 0 = No operation. 1 = Clear output bit.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data